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Introduced software Pipelining technique. Now requests from any process or thread are processed in a pipeline manner (read - execute - write) overlapping memory transfers with kernel execution and hiding PCIe overhead.
Modified InAccel Monitor to track down the performance of the accelerator pipelines, show the detailed status of each stage and report the outcome of each request.
Optimized the runtime backend for Xilinx devices, by using the vendor-recommended memory migration API.
- Enabled Statsd monitoring service for Enterprise Edition licenses. You can now monitor accelerator execution, FPGA utilization and system effectiveness through an analytical Web UI (alpha).
Refined and optimized C++ API - Reimplemented from scratch to provide native C++ performance and easy to use APIs to interact with Coral. By offering our custom allocator, kernel arguments can now be populated by simply interacting with std::vector.
Facilitated the deployment process of new bitstreams and eliminated the up-to-now prerequisite of restarting Coral for any bitstream modifications. From now on, you can register your bitstreams to Coral through an easy-to-use CLI and invoke requests on those kernels without additional operations.
Added a rich set of options for bitstream configuration file. Those options allow better organization granularity and versioning of your bitstreams. Additionally, the arguments of each kernel along with their types and access permissions are explicitly specified.
Added support for bitstream repository management to organize your bitstream portfolio based on target vendor, tooling version and many other options. All this functionality is supported out-of-the-box with a simple, yet intuitive bitstream configuration file (JSON/XML).